0338662 20240103193047.020100219235959.9 2010 image processing reconfiguration hardware object FPGA cav_un_auth*0225750 Kloub Jan Zpracování signálů Department of Signal Processing ZS ZS UTIA-B Ústav teorie informace a automatizace AV ČR, v. v. i. 7H09005 GA MŠk cav_un_auth*0253180 CEZ:AV0Z10750506 The paper presents an implementation of a graphic computing element (GCE) which can be used as a runtime parametrized building block in image processing applications in FPGAs. 2010 JC http://hdl.handle.net/11104/0182383 2010 2010