0341115 20240103193320.420100325235959.9 000275540000015 77949479195 10.1145/1698772.1698787 32 s. cav_un_epca*00841081539-908793 (2010)1-31 FPGA DSP logarithmic arithmetic affine projection cav_un_auth*0101213 Tichý Milan Zpracování signálů Department of Signal Processing ZS ZS UTIA-B Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0101190 Schier Jan Zpracování obrazové informace Department of Image Processing ZOI ZOI UTIA-B Department of Image Processing Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0216190 Gregg D. IE http://library.utia.cas.cz/separaty/2010/ZS/tichy-0341115.pdf 7H09005 GA MŠk cav_un_auth*0253180 CEZ:AV0Z10750506 This article shows that FPGA devices are a highly suitable platform for more computationally intensive adaptive algorithms. We present an optimized core which implements GSFAP. GSFAP is an algorithm with far superior adaptation properties than NLMS, and with only slightly higher computational complexity. To further optimize resource requirements we use logarithmic arithmetic, rather than conventional floating point, within the custom core. 2011 BD 4 A 4a 20231122133948.5 http://hdl.handle.net/11104/0184199 COMPUTERSCIENCE.HARDWARE&ARCHITECTURE 0.093 4.1 0.00174 356 54 14 0.557 33.32 2.56 Q2 Q2 2010 Soubory v repozitáři: tichy-0341115.pdf 77949479195 SCOPUS 000275540000015 WOS cav_un_epca*0084108 ACM Transactions on Embedded Computing Systems 1539-9087 1558-3465 Roč. 9 č. 3 2010 1 31