0360749 20240103195315.720110707235959.9 2 s. cav_un_epca*0360748978-1-4503-0667-6427-428LausanneACM Press2011 embedded systems multi-core systems cav_un_auth*0272875 Pacull F. FR cav_un_auth*0272876 Bertels K. NL cav_un_auth*0101077 Daněk Martin Zpracování signálů Department of Signal Processing ZS ZS UTIA-B Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0272878 Urlini G. IT http://library.utia.cas.cz/separaty/2011/ZS/danek-smecy smarti multi-core embedded systems (special session).pdf JU 100230 Artemis JU CZ 7H10001 GA MŠk CZ cav_un_auth*0272880 CEZ:AV0Z10750506 SMECY project is an ambitious European initiative involving 29 partners across 9 countries to enable Europe to have a leader role in multi-core domain by developing new programming technologies enabling the exploitation of architectures offering hundreds of cores. Multi-core technologies will rapidly provide to the parallel computing field improved performance, energy saving and cost reduction and will become of strategic value in winning market share in all areas of embedded systems. Given the need, SMECY lays the focus on targeting programming multi-core architecture for consumer electronics with efficient resources management. The first presentation describes the overall project while the two others are respectively dedicated to the multi-core platforms targeted in the project and the description of the tools constituting the bricks of the tool chains. cav_un_auth*0272879 21st Great Lakes Symposium on VLSI Design - GLSVLSI 2011 Lausanne 02.05.2011-04.05.2011 CH 2012 JC 4 http://hdl.handle.net/11104/0198228 2011 cav_un_epca*0360748 Proceedings of 21st Great Lakes Symposium on VLSI Design - GLSVLSI 2011 978-1-4503-0667-6 427 428 Proceedings of 21st Great Lakes Symposium on VLSI Design - GLSVLSI 2011 Lausanne ACM Press 2011