0382187 20240103201405.320121105235959.9 2 s. C cav_un_epca*0382183978-2-9539987-2-61966-7116375-376GièresElectronic Chips & Systems design Initiative2012MorawiecAdamHinderscheitJinnie video surveillance smart camera custom accelerators vector processing FPGA cav_un_auth*0202591 Bartosinski Roman Zpracování signálů Department of Signal Processing ZS ZS UTIA-B Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0101077 Daněk Martin Zpracování signálů Department of Signal Processing ZS ZS UTIA-B Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0261496 Sýkora Jaroslav Zpracování signálů Department of Signal Processing ZS ZS UTIA-B Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0225749 Kohout Lukáš Zpracování signálů Department of Signal Processing ZS ZS UTIA-B Department of Signal Processing Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0233557 Honzík P. CZ http://library.utia.cas.cz/separaty/2012/ZS/bartosinski-0382187.pdf 7H10001 GA MŠk CZ cav_un_auth*0272880 This demonstration shows an early prototype of low-level image processing to be used in an embedded smart camera, that is foreground detection and image segmentation. The example uses camera with resolution 640x480 pixels for input images processed at 100MHz in the FPGA. The input can be easily extended to higher resolutions. The processed output is displayed on LCD screen. cav_un_auth*0284632 Conference on Design & Architectures for Signal & Image Processing Karlsruhe 23.10.2012-25.10.2012 DE 2013 JC PO RVO:67985556 http://hdl.handle.net/11104/0212481 2012 cav_un_epca*0382183 Proceedings of the 2012 Conference on Design & Architectures for Signal & Image Processing 978-2-9539987-2-6 1966-7116 375 376 Gières Electronic Chips & Systems design Initiative 2012 Morawiec Adam 340 Hinderscheit Jinnie 340