A systolic algorithm for the block-regularized RLS identification. Abstract

0408944 20240103182037.620060210235959.9 A systolic algorithm for the block-regularized RLS identification. Abstract Leuven Katholieke Universiteit 1994 Algorithms and Parallel VLSI Architectures. Abstracts- cav_un_auth*0101190 Schier Jan UTIA-B Department of Image Processing Ústav teorie informace a automatizace AV ČR, v. v. i. 102/93/0897 GA ČR cav_un_auth*0211931 cav_un_auth*0212041 International Workshop on Algorithms and Parallel VLSI Architectures /3./ Leuven BE 29.08.1994-31.08.1994 AS http://hdl.handle.net/11104/0129046 UTIA-B 940182 1994 1994 Leuven Katholieke Universiteit Algorithms and Parallel VLSI Architectures. Abstracts s.