0409292 20240103182058.820060210235959.9 A systolic algorithm for block-regularized RLS identification cav_un_epca*02567600167-9260Integration, the VLSI Journal2085-100Elsevier cav_un_auth*0101190 Schier Jan UTIA-B Department of Image Processing Ústav teorie informace a automatizace AV ČR, v. v. i. http://library.utia.cas.cz/prace/960040.ps.zip 09I 102/95/1614 GA ČR cav_un_auth*0212163 102/95/0926 GA ČR cav_un_auth*0212164 ZS http://hdl.handle.net/11104/0129389 UTIA-B 960040 1995 cav_un_epca*0256760 Integration, the VLSI Journal 0167-9260 1872-7522 Roč. 20 - 1995 85 100 Elsevier