0410867 20240103182244.920060210235959.9 3-540-44108-5 Berlin Springer 2002 10 s. Lecture Notes in Computer Science. 2438 627-636GlesnerM.ZipfP.RenovellM. LNS, DSP, QRD FPGA, HSLA, FPU cav_un_auth*0101159 Matoušek Rudolf UTIA-B Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0101213 Tichý Milan UTIA-B Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0101179 Pohl Zdeněk UTIA-B Department of Signal Processing Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0101120 Kadlec Jiří UTIA-B Department of Signal Processing Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0212939 Softley C. GB 09G 09H 33544 ESPRIT XE LN00B096 GA MŠk cav_un_auth*0027922 CEZ:AV0Z1075907 This work has demonstrated that it is possible to design a LNS arithmetic core library of a practical word length. All main arithmetic algorithms were shown. A small case study has shown that for some applications provides the LNS solution substantially better performance while consuming a comparable area. The strengths of the LNS lies in fast multiplications, divisions, squares and square roots. It allows us to implement algorithms that are not suitable for pipelining. cav_un_auth*0212940 International Conference FPL 2002 /12./ Montpellier FR 02.09.2002-04.09.2002 JC ZS http://hdl.handle.net/11104/0130954 UTIA-B 20020081 2002 2002 Berlin Springer 3-540-44108-5 Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream 627 636 Glesner M. 340 Zipf P. 340 Renovell M. 340