0410974 20240103182252.720060210235959.9 80-7080-500-5 1 Praha VŠCHT 2002 5 s. 280-284 Xilinx System Generator field programmable gate arrays MATLAB/Simulink cav_un_auth*0101152 Líčko Miroslav UTIA-B Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0212986 Métais B. FR cav_un_auth*0101213 Tichý Milan UTIA-B Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0101159 Matoušek Rudolf UTIA-B Ústav teorie informace a automatizace AV ČR, v. v. i. 09H 09G LN00B096 GA MŠk cav_un_auth*0027922 CEZ:AV0Z1075907 The paper introduces support of floating point(FP) data format for the Xilinx System Generator (XSG) using logarithmic arithmetic. This type of arithmetic seems to be one of the promising ways to solve FP sort of DSP problems in practice. Our 32-bit high-speed logarithmic arithmetic (HSLA) keeps the accuracy according to IEEE 754 and speed up some kinds of FP algorithms. Promising is 19-bit equivalent utilised int this paper. It offers reasonable precision for the practical use and has min.HW requirements. cav_un_auth*0212971 MATLAB 2002 Praha CZ 07.11.2002 JC ZS http://hdl.handle.net/11104/0131061 UTIA-B 20020188 2002 2002 Praha VŠCHT 80-7080-500-5 MATLAB 2002. Sborník příspěvků 10. ročníku konference 280 284 MATLAB 2002. Proceedings of the 10th conference