0411121 20240103182303.420060210235959.9 3-540-40822-3 Berlin Springer 2003 4 s. Lecture Notes in Computer Science. 2778 984-987CheungP. Y. K.ConstantinidesG. A.de SousaJ. T. Matlab Simulink FPGA cav_un_auth*0101152 Líčko Miroslav UTIA-B Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0101190 Schier Jan UTIA-B Department of Image Processing Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0101213 Tichý Milan UTIA-B Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0213050 Kühl M. DE 09G 09H 2001-34016 IST XE KONTAKT CZE01/019 GA MŠk cav_un_auth*0213052 LN00B096 GA MŠk cav_un_auth*0027922 CEZ:AV0Z1075907 The paper is focused on rapid prototyping for FPGA using the high-level environment of MATLAB/Simulink. An approach using combination of the Xilinx System Generator (XSG) and Handel-C is rewieved. A design flow to minimize HDL coding is considered. cav_un_auth*0213051 Field-Programmable Logic and Applications /13./ Lisabon PT 01.09.2003-03.09.2003 JC ZS http://hdl.handle.net/11104/0131208 UTIA-B 20030108 2003 2003 Berlin Springer 3-540-40822-3 Field-Programmable Logic and Applications. Proceedings of the 13th International Conference 984 987 Cheung P. Y. K. 340 Constantinides G. A. 340 de Sousa J. T. 340