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<bibitem type="C">   <ARLID>0411124</ARLID> <utime>20240103182303.6</utime><mtime>20060210235959.9</mtime>    <ISBN>80-86645-05-3</ISBN>         <title language="eng" primary="1">Dynamic reconfiguration of FPGAs</title>  <publisher> <place>Prague</place> <name>Czech Technical University</name> <pub_time>2003</pub_time> </publisher> <specification> <page_count>4 s.</page_count> </specification>   <serial><title>Recent Trends in Multimedia Information Processing. Proceedings</title><part_num/><part_title/><page_num>288-291</page_num><editor><name1>Šimák</name1><name2>B.</name2></editor><editor><name1>Zahradník</name1><name2>P.</name2></editor></serial>    <keyword>dynamic reconfiguration</keyword>   <keyword>FPGA</keyword>   <keyword>CAD</keyword>    <author primary="1"> <ARLID>cav_un_auth*0101159</ARLID> <name1>Matoušek</name1> <name2>Rudolf</name2> <institution>UTIA-B</institution>  <fullinstit>Ústav teorie informace a automatizace AV ČR, v. v. i.</fullinstit> </author> <author primary="0"> <ARLID>cav_un_auth*0101179</ARLID> <name1>Pohl</name1> <name2>Zdeněk</name2> <institution>UTIA-B</institution> <full_dept>Department of Signal Processing</full_dept>  <fullinstit>Ústav teorie informace a automatizace AV ČR, v. v. i.</fullinstit> </author> <author primary="0"> <ARLID>cav_un_auth*0101077</ARLID> <name1>Daněk</name1> <name2>Martin</name2> <institution>UTIA-B</institution>  <fullinstit>Ústav teorie informace a automatizace AV ČR, v. v. i.</fullinstit> </author> <author primary="0"> <ARLID>cav_un_auth*0101120</ARLID> <name1>Kadlec</name1> <name2>Jiří</name2> <institution>UTIA-B</institution> <full_dept>Department of Signal Processing</full_dept>  <fullinstit>Ústav teorie informace a automatizace AV ČR, v. v. i.</fullinstit> </author>     <COSATI>09G</COSATI> <COSATI>09H</COSATI>    <cas_special> <project> <project_id>IST-2001-34016</project_id> <agency>EU IST</agency> <country>XE</country> <ARLID>cav_un_auth*0200683</ARLID> </project> <research> <research_id>CEZ:AV0Z1075907</research_id> </research>  <abstract language="eng" primary="1">Dymnamic reconfiguration of FPGA devices has been an issue of the last decade. Althouth this new feature of currently available devices permits more robust and flexible designs, it has not been recognized by professionals. This paper disscussed demands placed by dynamic reconfiguration on design tools as well as on designes themselves. A case study is presented for the Atmel AT94K family and the supplied design tools, and values are provided that should aid in analyzing such designs.</abstract>  <action target="WRD"> <ARLID>cav_un_auth*0213054</ARLID> <name>International Workshop on Systems, Signals and Image Processing /10./</name> <place>Praha</place> <country>CZ</country> <dates>10.09.2003-11.09.2003</dates>  </action>     <RIV>JC</RIV>   <department>ZS</department>    <permalink>http://hdl.handle.net/11104/0131211</permalink>   <ID_orig>UTIA-B 20030111</ID_orig>     <arlyear>2003</arlyear>       <unknown tag="mrcbU10"> 2003 </unknown> <unknown tag="mrcbU10"> Prague Czech Technical University </unknown> <unknown tag="mrcbU12"> 80-86645-05-3 </unknown> <unknown tag="mrcbU63"> Recent Trends in Multimedia Information Processing. Proceedings 288 291 </unknown> <unknown tag="mrcbU67"> Šimák B. 340 </unknown> <unknown tag="mrcbU67"> Zahradník P. 340 </unknown> </cas_special> </bibitem>