0411172 20240103182307.020060210235959.9 Southampton University of Southampton 2003 3 s. 1-3HettiaratchiS. rapid prototyping FPGA MATLAB/Simulink cav_un_auth*0101152 Líčko Miroslav UTIA-B Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0101190 Schier Jan UTIA-B Department of Image Processing Ústav teorie informace a automatizace AV ČR, v. v. i. 09G 09H IST-2001-34016 Commission EC XE cav_un_auth*0200683 LN00B096 GA MŠk cav_un_auth*0027922 CEZ:AV0Z1075907 Rapid prototyping for FPGAs using high-level environment of MATLAB/Simulink is addressed in this paper. An approach using combination of the Xilinx System Generator (XSG) and Handel-C is given. A design flow to minimize HDL coding is considered. cav_un_auth*0213093 UK ACM SIGDA Workshop on Electronic Design Automation /3./ Southampton GB 11.09.2003-12.09.2003 JC ZS http://hdl.handle.net/11104/0131258 UTIA-B 20030159 2003 2003 Southampton University of Southampton UK ACM SIGDA 3rd Workshop on Electronic Design Automation 1 3 Hettiaratchi S. 340