0411173 20240103182307.120060210235959.9 Southampton University of Southampton 2003 4 s. 1-4HettiaratchiS. dynamic reconfiguration FPGA Virtex-VHDL cav_un_auth*0101159 Matoušek Rudolf UTIA-B Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0101179 Pohl Zdeněk UTIA-B Department of Signal Processing Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0101077 Daněk Martin UTIA-B Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0101120 Kadlec Jiří UTIA-B Department of Signal Processing Ústav teorie informace a automatizace AV ČR, v. v. i. 09G 09H IST-2001-34016 Commission EC XE cav_un_auth*0200683 CEZ:AV0Z1075907 This paper disscusses dynamic reconfiguration achievable using current FPGA technology. An analysis of implementation issues has been presented and desirable features of future generation of CAD tools have been disscussed. Several practical examples based on swapping dynamic modules have been presented together with their implementation data. cav_un_auth*0213093 UK ACM SIGDA Workshop on Electronic Design Automation /3./ Southampton GB 11.09.2003-12.09.2003 JC ZS http://hdl.handle.net/11104/0131259 UTIA-B 20030160 2003 2003 Southampton University of Southampton UK ACM SIGDA 3rd Workshop on Electronic Design Automation 1 4 Hettiaratchi S. 340