0411193 20240111140636.220060210235959.9 Praha ÚTIA AV ČR 2003 CD-ROM RLS Lattice FPGA noise cancelation cav_un_auth*0101179 Pohl Zdeněk UTIA-B Department of Signal Processing Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0101120 Kadlec Jiří UTIA-B Department of Signal Processing Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0101152 Líčko Miroslav UTIA-B Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0101159 Matoušek Rudolf UTIA-B Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0101213 Tichý Milan UTIA-B Ústav teorie informace a automatizace AV ČR, v. v. i. program 32 MB 09G 09H LN00B096 GA MŠk cav_un_auth*0027922 CEZ:AV0Z1075907 A demo for XSV-800 board from XESS corporation. A 10-bit logarithmic arithmetic is used for implementation of a high performance DSP application. It is performing noise cancelation for audio signals from audiocodec inputs and wieting output to the audio output. The demo is possible to be downloaped from the UTIA website. JC ZS http://hdl.handle.net/11104/0131279 UTIA-B 20030180 2003 2003 Praha ÚTIA AV ČR program 32 MB