0411279 20240103182314.920060210235959.9 5 s. cav_un_epca*02972031212-4702104 (2004)9-13 FPGA LMS algorithm Handel-C cav_un_auth*0202597 Mazanec Tomáš UTIA-B Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0213152 Brothánek M. CZ 090 CEZ:AV0Z1075907 Cílem práce bylo implementovat metodu kompenzace echa na platformě programovatelného obvodu FPGA. Řešení zahrnuje jak praktické využití adaptivní filtrace, tak implementaci zadané úlohy do HW podoby. This article describes implementation of echo canceller on a FPGA programmable device (Xilinx, Virtex), which was done. The solution of this adaptive filtering task was aimed to least squares algorithms, especially to the LMS and normalized LMS algorithm. Used digital filterswere the type of finite impulse response in transveral structure. The FPGA implementation was created in Handel-C of DK 2.0 system which is designed to rapis prototyping flow. JC 2006 ZS http://hdl.handle.net/11104/0131362 UTIA-B 20050006 2004 cav_un_epca*0297203 Akustické listy 1212-4702 Roč. 10 č. 4 2004 9 13