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<bibitem type="J">   <ARLID>0411292</ARLID> <utime>20240103182316.1</utime><mtime>20060210235959.9</mtime>        <title language="eng" primary="1">Reconfigurable system on programmable chip platform</title>  <specification> <page_count>4 s.</page_count> </specification>   <serial><title>ATMEL Applications Journal</title><part_num/><part_title/><page_num>9-12</page_num></serial>   <title language="cze" primary="0">Rekonfigurovatelný systém pro programovatelný integrovaný obvod</title>    <keyword>reconfigurable system</keyword>   <keyword>FPGA</keyword>    <author primary="1"> <ARLID>cav_un_auth*0101077</ARLID> <name1>Daněk</name1> <name2>Martin</name2> <institution>UTIA-B</institution>  <fullinstit>Ústav teorie informace a automatizace AV ČR, v. v. i.</fullinstit> </author> <author primary="0"> <ARLID>cav_un_auth*0108102</ARLID> <name1>Honzík</name1> <name2>Petr</name2> <institution>UTIA-B</institution>  <fullinstit>Ústav teorie informace a automatizace AV ČR, v. v. i.</fullinstit> </author> <author primary="0"> <ARLID>cav_un_auth*0101120</ARLID> <name1>Kadlec</name1> <name2>Jiří</name2> <institution>UTIA-B</institution> <full_dept>Department of Signal Processing</full_dept>  <fullinstit>Ústav teorie informace a automatizace AV ČR, v. v. i.</fullinstit> </author> <author primary="0"> <ARLID>cav_un_auth*0101159</ARLID> <name1>Matoušek</name1> <name2>Rudolf</name2> <institution>UTIA-B</institution>  <fullinstit>Ústav teorie informace a automatizace AV ČR, v. v. i.</fullinstit> </author> <author primary="0"> <ARLID>cav_un_auth*0101179</ARLID> <name1>Pohl</name1> <name2>Zdeněk</name2> <institution>UTIA-B</institution> <full_dept>Department of Signal Processing</full_dept>  <fullinstit>Ústav teorie informace a automatizace AV ČR, v. v. i.</fullinstit> </author>     <COSATI>09G</COSATI> <COSATI>09H</COSATI>    <cas_special> <project> <project_id>IST-2001-34016</project_id> <agency>EU FP5 IST Programme</agency> <country>XE</country> <ARLID>cav_un_auth*0200683</ARLID> </project> <project> <project_id>GA102/04/2137</project_id> <agency>GA ČR</agency> <ARLID>cav_un_auth*0004198</ARLID> </project> <research> <research_id>CEZ:AV0Z10750506</research_id> </research>  <abstract language="eng" primary="1">This paper presents an universal reconfigurable SOPC platform based on a combination of the Atmel AT94K FPSLIC device and an external memory. The presented platform increases the power of the FPSLIC device both by extending the internal address space through an introduction of a virtual program memory and by providing a transparent infrastructure for FPGA reconfiguration. The platform is demonstrated on two simple designs that demonstrate both aspects.</abstract> <abstract language="cze" primary="0">Článek popisuje podporu pro universální mikroprocesor kombinovaný s programovatelným logickým obvodem na jediném čipu FPSLIC. Podpora dovoluje částečnou rekonfiguraci.</abstract>      <RIV>JC</RIV> <reportyear>2006</reportyear>   <department>ZS</department>    <permalink>http://hdl.handle.net/11104/0131375</permalink>    <ID_orig>UTIA-B 20050020</ID_orig>    <arlyear>2005</arlyear>       <unknown tag="mrcbU63"> ATMEL Applications Journal č. 4 2005 9 12 </unknown> </cas_special> </bibitem>