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<bibitem type="J">   <ARLID>0411362</ARLID> <utime>20240103182321.6</utime><mtime>20060210235959.9</mtime>        <title language="eng" primary="1">Reconfigurable System-on-a-Chip</title>  <specification> <page_count>3 s.</page_count> </specification>   <serial><title>Syndicated</title><part_num/><part_title/><volume_id>5</volume_id><volume>2 (2005)</volume><page_num>1-3</page_num></serial>   <title language="cze" primary="0">Rekonfigurovatelné systémy na jediném čipu</title>    <keyword>FPGA</keyword>   <keyword>dynamic reconfiguratio</keyword>   <keyword>system-on-chip</keyword>    <author primary="1"> <ARLID>cav_un_auth*0101159</ARLID> <name1>Matoušek</name1> <name2>Rudolf</name2> <institution>UTIA-B</institution>  <fullinstit>Ústav teorie informace a automatizace AV ČR, v. v. i.</fullinstit> </author> <author primary="0"> <ARLID>cav_un_auth*0101077</ARLID> <name1>Daněk</name1> <name2>Martin</name2> <institution>UTIA-B</institution>  <fullinstit>Ústav teorie informace a automatizace AV ČR, v. v. i.</fullinstit> </author> <author primary="0"> <ARLID>cav_un_auth*0101179</ARLID> <name1>Pohl</name1> <name2>Zdeněk</name2> <institution>UTIA-B</institution> <full_dept>Department of Signal Processing</full_dept>  <fullinstit>Ústav teorie informace a automatizace AV ČR, v. v. i.</fullinstit> </author> <author primary="0"> <ARLID>cav_un_auth*0202591</ARLID> <name1>Bartosinski</name1> <name2>Roman</name2> <institution>UTIA-B</institution>  <fullinstit>Ústav teorie informace a automatizace AV ČR, v. v. i.</fullinstit> </author> <author primary="0"> <ARLID>cav_un_auth*0108102</ARLID> <name1>Honzík</name1> <name2>Petr</name2> <institution>UTIA-B</institution>  <fullinstit>Ústav teorie informace a automatizace AV ČR, v. v. i.</fullinstit> </author>     <COSATI>09G</COSATI> <COSATI>09H</COSATI>    <cas_special> <project> <project_id>1ET400750406</project_id> <agency>GA AV ČR</agency> <ARLID>cav_un_auth*0001796</ARLID> </project> <project> <project_id>1QS108040510</project_id> <agency>GA AV ČR</agency> <ARLID>cav_un_auth*0202864</ARLID> </project> <project> <project_id>1ET400750408</project_id> <agency>GA AV ČR</agency> <ARLID>cav_un_auth*0001798</ARLID> </project> <research> <research_id>CEZ:AV0Z10750506</research_id> </research>  <abstract language="eng" primary="1">Reconfiguration technology has not evolved much in the last decade. Reconfigurable FPGAs are available, but the design flow for dynamically reconfigurable application is quite complex and there are only a few tools that automate it. The most interesting advantage of dynamic reconfiguration is a possibility to increase an application`s functional density. The use of reconfiguration may bring some other profits such as good system extensibility after the system expedition or more favorable power consuption.</abstract> <abstract language="cze" primary="0">Článek ve třech kapitolách shrnuje základní principy a metodiku návrhu rekonfigurovatelných systémů na čipu. První kapitola vysvětluje principy rekonfigurovatelných systémů. Druhá kapitola srovnává výsledky implementací takových systému do čipů firem Atmel a Xilinx. Poslední kapitola popisuje reálnou aplikaci - zápisník pro nevidomé, která využívá danou technologii.</abstract>      <RIV>JC</RIV> <reportyear>2006</reportyear>   <department>ZS</department>    <permalink>http://hdl.handle.net/11104/0131444</permalink>    <ID_orig>UTIA-B 20050092</ID_orig>    <arlyear>2005</arlyear>       <unknown tag="mrcbU63"> Syndicated Roč. 5 č. 2 2005 1 3 </unknown> </cas_special> </bibitem>