<?xml version="1.0" encoding="utf-8"?>
<?xml-stylesheet type="text/xsl" href="style/detail_T.xsl"?>
<bibitem type="L">   <ARLID>0504527</ARLID> <utime>20240103222015.2</utime><mtime>20190514235959.9</mtime>         <title language="eng" primary="1">Arrowhead Compatible Zynq Ultrascale+ Systems with Xilinx SDSoC 2018.2 Support</title>  <publisher> <pub_time>2019</pub_time> </publisher>    <keyword>Arrowhead Framework producer</keyword>   <keyword>Arrowhead Framework consumer</keyword>   <keyword>system level compiler</keyword>   <keyword>HW acceleration</keyword>   <keyword>programmable logic array</keyword>    <author primary="1"> <ARLID>cav_un_auth*0101120</ARLID> <name1>Kadlec</name1> <name2>Jiří</name2> <institution>UTIA-B</institution> <full_dept language="cz">Zpracování signálů</full_dept> <full_dept language="eng">Department of Signal Processing</full_dept> <department language="cz">ZS</department> <department language="eng">ZS</department> <full_dept>Department of Signal Processing</full_dept> <fullinstit>Ústav teorie informace a automatizace AV ČR, v. v. i.</fullinstit> </author> <author primary="0"> <ARLID>cav_un_auth*0101179</ARLID> <name1>Pohl</name1> <name2>Zdeněk</name2> <institution>UTIA-B</institution> <full_dept language="cz">Zpracování signálů</full_dept> <full_dept>Department of Signal Processing</full_dept> <department language="cz">ZS</department> <department>ZS</department> <full_dept>Department of Signal Processing</full_dept> <fullinstit>Ústav teorie informace a automatizace AV ČR, v. v. i.</fullinstit> </author> <author primary="0"> <ARLID>cav_un_auth*0225749</ARLID> <name1>Kohout</name1> <name2>Lukáš</name2> <institution>UTIA-B</institution> <full_dept language="cz">Zpracování signálů</full_dept> <full_dept>Department of Signal Processing</full_dept> <department language="cz">ZS</department> <department>ZS</department> <full_dept>Department of Signal Processing</full_dept> <fullinstit>Ústav teorie informace a automatizace AV ČR, v. v. i.</fullinstit> </author>   <source>  <url>http://sp.utia.cz/index.php?ids=results&amp;id=Zynq_Ultrascale</url> </source>        <cas_special> <project> <ARLID>cav_un_auth*0359206</ARLID> <project_id>737459</project_id> <agency>EC</agency> <country>XE</country>  </project>  <abstract language="eng" primary="1">The evaluation package describes supports in total nine Zynq Ultrascale+ systems with common procedure for generation of the board support package for Petalinux 2018.2 kernel, Debian OS and for the Arrowhead framework clients.</abstract>     <RIV>JC</RIV> <FORD0>20000</FORD0> <FORD1>20200</FORD1> <FORD2>20206</FORD2>    <reportyear>2020</reportyear>       <num_of_auth>3</num_of_auth>  <unknown tag="mrcbC52"> 4 A hod 4ah 20231122144003.3 </unknown>  <permalink>http://hdl.handle.net/11104/0296327</permalink>  <unknown tag="mrcbC64"> 1 Department of Signal Processing UTIA-B 20206 COMPUTER SCIENCE, HARDWARE &amp; ARCHITECTURE </unknown>  <confidential>S</confidential>        <arlyear>2019</arlyear>    <unknown tag="mrcbTft">  Soubory v repozitáři: kadlec-0504527.pdf </unknown>    <unknown tag="mrcbU10"> 2019 </unknown> </cas_special> </bibitem>