0507674 20240103222427.920190819235959.9 2019 Arrowhead Framework producer Arrowhead Framework consumer system level compiler HW acceleration programmable logic array cav_un_auth*0101120 Kadlec Jiří Zpracování signálů Department of Signal Processing ZS ZS UTIA-B Department of Signal Processing Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0101179 Pohl Zdeněk Zpracování signálů Department of Signal Processing ZS ZS UTIA-B Department of Signal Processing Ústav teorie informace a automatizace AV ČR, v. v. i. cav_un_auth*0225749 Kohout Lukáš Zpracování signálů Department of Signal Processing ZS ZS UTIA-B Department of Signal Processing Ústav teorie informace a automatizace AV ČR, v. v. i. http://sp.utia.cz/index.php?ids=results&id=FitOptiVis-te0726-SDSoC-2018_2 cav_un_auth*0374054 8A18013 GA MŠk The functional sample describes FitOptiVis design time and run time resources supporting the ZynqBerry board and Xilinx SDSoC 2018.2 system level compiler. The concrete board is ZynqBerry TE0726-03M. It works with Xilinx XC07010-1C device with the dual core Arm A9 32 bit and relatively small programmable logic area on single 28 nm chip. The ZynqBerry PCB has RaspberryPi 2 form factor. The ZynqBerry board is designed and manufactured by company Trenz Electronic. JC 20000 20200 20206 2020 3 RVO:67985556 http://hdl.handle.net/11104/0298668 S 2019 2019