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<bibitem type="L">   <ARLID>0567330</ARLID> <utime>20230316110404.4</utime><mtime>20230124235959.9</mtime>         <title language="eng" primary="1">Xilinx Vitis AI ‘facedetect’ and ‘resnet50’ Demo on Trenz Electronic TE0821-01-2cg-4GB SoM + TE0706-3 Carrier</title>  <publisher> <pub_time>2022</pub_time> </publisher>    <keyword>artificial intelligence</keyword>   <keyword>object detection</keyword>   <keyword>embedded systems</keyword>   <keyword>edge computing</keyword>   <keyword>Vitis AI 2.0</keyword>   <keyword>AMD-Xilinx</keyword>   <keyword>Zynq UltraScale+</keyword>    <author primary="1"> <ARLID>cav_un_auth*0101179</ARLID> <name1>Pohl</name1> <name2>Zdeněk</name2> <institution>UTIA-B</institution> <full_dept language="cz">Zpracování signálů</full_dept> <full_dept language="eng">Department of Signal Processing</full_dept> <department language="cz">ZS</department> <department language="eng">ZS</department> <full_dept>Department of Signal Processing</full_dept> <fullinstit>Ústav teorie informace a automatizace AV ČR, v. v. i.</fullinstit> </author> <author primary="0"> <ARLID>cav_un_auth*0225749</ARLID> <name1>Kohout</name1> <name2>Lukáš</name2> <institution>UTIA-B</institution> <full_dept language="cz">Zpracování signálů</full_dept> <full_dept>Department of Signal Processing</full_dept> <department language="cz">ZS</department> <department>ZS</department> <full_dept>Department of Signal Processing</full_dept> <fullinstit>Ústav teorie informace a automatizace AV ČR, v. v. i.</fullinstit> </author> <author primary="0"> <ARLID>cav_un_auth*0101120</ARLID> <name1>Kadlec</name1> <name2>Jiří</name2> <institution>UTIA-B</institution> <full_dept language="cz">Zpracování signálů</full_dept> <full_dept>Department of Signal Processing</full_dept> <department language="cz">ZS</department> <department>ZS</department> <full_dept>Department of Signal Processing</full_dept> <fullinstit>Ústav teorie informace a automatizace AV ČR, v. v. i.</fullinstit> </author>   <source> <url>https://zs.utia.cas.cz/index.php?ids=results&amp;id=te0821_2cg_vitis_ai</url>  </source>        <cas_special> <project> <project_id>8A21009</project_id> <agency>GA MŠk</agency> <agency>EC</agency> <ARLID>cav_un_auth*0432581</ARLID> </project>  <abstract language="eng" primary="1">Tutorial how to setup and run Vitis AI 2.0 demo 'facedetect' and 'resnet50' on Trenz TE0821-01-2cg-4GB SoM assembled to TE0706 carrier board. The DPU unit used in zcu104 or zcu102 doesn't fit into the used SoM. For that reason, the reduced DPU configuration is provided as well as recompiled models for demos.</abstract>     <RIV>JC</RIV> <FORD0>20000</FORD0> <FORD1>20200</FORD1> <FORD2>20206</FORD2>    <reportyear>2023</reportyear>       <num_of_auth>3</num_of_auth>   <permalink>https://hdl.handle.net/11104/0339735</permalink>   <confidential>S</confidential>        <arlyear>2022</arlyear>       <unknown tag="mrcbU10"> 2022 </unknown> </cas_special> </bibitem>