| bibtype |
J -
Journal Article
|
| ARLID |
0039044 |
| utime |
20240103182537.0 |
| mtime |
20060831235959.9 |
| title
(primary) (cze) |
Platforma s částečnou dynamickou rekonfigurací FPGA |
| specification |
|
| serial |
| ARLID |
cav_un_epca*0290493 |
| ISSN |
1210-9592 |
| title
|
Automa |
| volume_id |
12 |
| volume |
5 (2006) |
| page_num |
40-43 |
|
| title
(eng) |
Reconfigurable System-on-a-Programable-Chip Platform |
| keyword |
FPGA |
| keyword |
dynamic reconfiguration |
| keyword |
SoC |
| author
(primary) |
| ARLID |
cav_un_auth*0101077 |
| name1 |
Daněk |
| name2 |
Martin |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0108102 |
| name1 |
Honzík |
| name2 |
Petr |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0101120 |
| name1 |
Kadlec |
| name2 |
Jiří |
| institution |
UTIA-B |
| full_dept |
Department of Signal Processing |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0101179 |
| name1 |
Pohl |
| name2 |
Zdeněk |
| institution |
UTIA-B |
| full_dept |
Department of Signal Processing |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0101159 |
| name1 |
Matoušek |
| name2 |
Rudolf |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| COSATI |
09G |
| COSATI |
09H |
| cas_special |
| project |
| project_id |
GA102/04/2137 |
| agency |
GA ČR |
| ARLID |
cav_un_auth*0004198 |
|
| project |
| project_id |
IST-2001-34016 |
| agency |
Commisions EC |
| country |
XE |
| ARLID |
cav_un_auth*0200683 |
|
| research |
CEZ:AV0Z10750506 |
| abstract
(cze) |
Tento text popisuje univerzální platformu pro dynamickou rekonfiguraci na obvodech FPGA. Platforma je postavena na obvodu AT94K FPSLIC od firmy Atmel ve spojení s externí pamětí. Takto navržená platforma výrazně zvyšuje užitnost obvodu FPSLIC a spolu se systémem virtuální paměti vytváří prostředek pro vývoj aplikací, který je z hlediska dynamické rekonfigurace na FPGA plně transparentní a dovoluje tak vytvářet robustní aplikace s minimální znalostí obvodů FPGA. |
| abstract
(eng) |
This paper presents a universal reconfigurable COPC platform based on a combination of the Atmel AT94K FPSLIC device and an external memory. The presented platform increases the power of the FPSLIC device both by extending the internal address space through an introduction of a virtual program memory and by providing a transparent infrastructure for FPGA reconfiguration. The platform is demonstrated on two simple designs that demonstrate both aspects. |
| reportyear |
2007 |
| RIV |
JC |
| permalink |
http://hdl.handle.net/11104/0133224 |
| arlyear |
2006 |
| mrcbU63 |
cav_un_epca*0290493 Automa 1210-9592 Roč. 12 č. 5 2006 40 43 |
|