| bibtype |
J -
Journal Article
|
| ARLID |
0085961 |
| utime |
20240103184437.4 |
| mtime |
20070919235959.9 |
| title
(primary) (eng) |
The European Logarithmic Microprocessor |
| specification |
|
| serial |
| ARLID |
cav_un_epca*0253225 |
| ISSN |
0018-9340 |
| title
|
IEEE Transactions on Computers |
| volume_id |
57 |
| volume |
4 (2008) |
| page_num |
532-546 |
|
| title
(cze) |
Evropský logaritmický mikroprocesor |
| keyword |
Processor architecture |
| keyword |
arithmetic unit |
| keyword |
logarithmic arithmetic |
| author
(primary) |
| ARLID |
cav_un_auth*0212571 |
| name1 |
Coleman |
| name2 |
J. N. |
| country |
GB |
|
| author
|
| ARLID |
cav_un_auth*0212654 |
| name1 |
Softley |
| name2 |
C. I. |
| country |
GB |
|
| author
|
| ARLID |
cav_un_auth*0101120 |
| name1 |
Kadlec |
| name2 |
Jiří |
| institution |
UTIA-B |
| full_dept |
Department of Signal Processing |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0212890 |
| name1 |
Matoušek |
| name2 |
R. |
| country |
CZ |
|
| author
|
| ARLID |
cav_un_auth*0101213 |
| name1 |
Tichý |
| name2 |
Milan |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0101179 |
| name1 |
Pohl |
| name2 |
Zdeněk |
| institution |
UTIA-B |
| full_dept |
Department of Signal Processing |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0101105 |
| name1 |
Heřmánek |
| name2 |
Antonín |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0230121 |
| name1 |
Benschop |
| name2 |
N. F. |
| country |
GB |
|
| source |
|
| cas_special |
| project |
| project_id |
ESPRIT 33544 |
| agency |
Evropská komise |
| country |
BE |
|
| research |
CEZ:AV0Z10750506 |
| abstract
(eng) |
In 2000 we described a proposal for a logarithmic arithmetic unit, which we suggested would offer a faster, more accurate alternative to floating-point procedures. Would it in fact do so, and could it feasibly be integrated into a microprocessor so that the intended benefits might be realised? Herein we describe the European Logarithmic Microprocessor, a device designed around that unit, and compare its performance with that of a commercial super-scalar pipelined floating-point processor. We conclude that the experiment has been successful; that for 32-bit work logarithmic arithmetic may now be the technique of choice. |
| abstract
(cze) |
V roce 2000 jsme popsali návrh logaritmické jednotky, která by se mohla stát rychlejší a přesnější alternativou k jednotkám využívajícím operace v plovoucí řádové čárce. V článku se zabýváme Evropským logaritmickým procesorem navrženým s využitím zmíněné logaritmické jednotky a porovnáním jeho výkonu s komerčními super-skalárními procesory. Článek uzavíráme konstatováním, že celý experiment s logaritmickou aritmetikou byl úspěšný a 32-bitové řešení může být s úspěchem využíváno v různých oblastech. |
| reportyear |
2008 |
| RIV |
JC |
| permalink |
http://hdl.handle.net/11104/0148357 |
| mrcbT16-f |
3.534 |
| mrcbT16-g |
0.447 |
| mrcbT16-h |
>10.0 |
| mrcbT16-i |
0.01535 |
| mrcbT16-j |
1 |
| mrcbT16-k |
9240 |
| mrcbT16-l |
132 |
| mrcbT16-q |
75 |
| mrcbT16-s |
1.621 |
| mrcbT16-y |
28.47 |
| mrcbT16-x |
2.52 |
| arlyear |
2008 |
| mrcbU63 |
cav_un_epca*0253225 IEEE Transactions on Computers 0018-9340 1557-9956 Roč. 57 č. 4 2008 532 546 |
|