| bibtype |
C -
Conference Paper (international conference)
|
| ARLID |
0090120 |
| utime |
20240111140654.0 |
| mtime |
20071123235959.9 |
| title
(primary) (eng) |
Simulink Model Converter for Embedded Video Accelerator |
| specification |
| page_count |
6 s. |
| media_type |
CD ROM |
|
| serial |
| ARLID |
cav_un_epca*0089691 |
| ISBN |
978-80-7080-658-6 |
| title
|
Technical Computing Prague 2007 |
| page_num |
79-79 |
| publisher |
| place |
Praha |
| name |
Humusoft |
| year |
2007 |
|
|
| title
(cze) |
Konvertor Simulinkových modelů pro vestavěný videoakcelerátor |
| keyword |
image processing accelerator |
| keyword |
Simulink |
| keyword |
configuration engine |
| keyword |
Simulink conversion |
| author
(primary) |
| ARLID |
cav_un_auth*0101136 |
| name1 |
Kovář |
| name2 |
Bohumil |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0101190 |
| name1 |
Schier |
| name2 |
Jan |
| institution |
UTIA-B |
| full_dept |
Department of Image Processing |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0202610 |
| name1 |
Zemčík |
| name2 |
P. |
| country |
CZ |
|
| author
|
| ARLID |
cav_un_auth*0202611 |
| name1 |
Herout |
| name2 |
A. |
| country |
CZ |
|
| author
|
| ARLID |
cav_un_auth*0232988 |
| name1 |
Zuzaňák |
| name2 |
J. |
| country |
CZ |
|
| source |
| source_type |
textový dokument |
|
| cas_special |
| project |
| project_id |
1ET400750408 |
| agency |
GA AV ČR |
| ARLID |
cav_un_auth*0001798 |
|
| research |
CEZ:AV0Z10750506 |
| abstract
(eng) |
An embedded DSP/FPGA system for accelaration of image or video processing, with a scripting-language-based configuration engine, pulling software modules or hardware blocks from function libraries, is considered. The Simulink environment is used for rapid application design for this system. The aspects of converting Simulink block diagrams into the scripting language for the configuration engine are discussed in the paper. |
| abstract
(cze) |
Článek se zabývá vestavěným DSP/FPGA akcelerátorem pro zpracování obrazu nebo videa. Tento akcelerátor používá vestavěný konfigurační engine, ovládaný skriptovacím jazykem, který dynamicky zavádí předem připravené funkční moduly. Pro rychlý vývoj aplikací je použito prostředí Simulinku. Článek pojednává o konverzi blokových schemat Simulinku do skriptovacího jazyku pro vestavěný engine. |
| action |
| ARLID |
cav_un_auth*0232685 |
| name |
Technical Computing Prague 2007 |
| place |
Praha |
| dates |
14.11.2007-14.11.2007 |
| country |
CZ |
|
| reportyear |
2008 |
| RIV |
JC |
| permalink |
http://hdl.handle.net/11104/0151121 |
| arlyear |
2007 |
| mrcbU56 |
textový dokument |
| mrcbU63 |
cav_un_epca*0089691 Technical Computing Prague 2007 978-80-7080-658-6 79 79 Praha Humusoft 2007 |
|