bibtype |
L -
Prototype, methodology, f. module, software
|
ARLID |
0093189 |
utime |
20240103185106.7 |
mtime |
20080104235959.9 |
title
(primary) (cze) |
Implementace akcelerátorů pro dekódování konvolučního a Reed-Solomonova zabezpečovacího kódu na obvodech FPGA |
publisher |
|
title
(eng) |
Implementation of Accelerators for Decoding Reed-Solomon and Convolution error-correcting code on FPGA |
keyword |
FPGA |
keyword |
Reed-Solomon encoder |
keyword |
Reed-Solomon decoder |
keyword |
PicoBlaze processor |
keyword |
Ethernet |
keyword |
Viterbi decoder |
keyword |
FEC |
keyword |
Convolution code |
keyword |
Error-correcting code |
author
(primary) |
ARLID |
cav_un_auth*0225750 |
name1 |
Kloub |
name2 |
Jan |
institution |
UTIA-B |
fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
author
|
ARLID |
cav_un_auth*0101105 |
name1 |
Heřmánek |
name2 |
Antonín |
institution |
UTIA-B |
fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
cas_special |
project |
project_id |
1ET100750408 |
agency |
GA AV ČR |
ARLID |
cav_un_auth*0001794 |
|
project |
project_id |
1ET300750402 |
agency |
GA AV ČR |
ARLID |
cav_un_auth*0001795 |
|
research |
CEZ:AV0Z10750506 |
abstract
(cze) |
Dokument popisuje implementaci akcelerátorů pro dekódování konvolučního a Reed-Solomonova zabezpečovacího kódu na obvodech FPGA a jejich použití v Matlabu. |
abstract
(eng) |
Document describes implementation of accelerators for decoding Reed-Solomon and convolution error-correcting code on FPGA and using accelerators in Matlab. |
reportyear |
2008 |
RIV |
JC |
permalink |
http://hdl.handle.net/11104/0153297 |
arlyear |
2007 |
mrcbU10 |
2007 |
|