bibtype |
A -
Abstract
|
ARLID |
0106220 |
utime |
20240103173125.8 |
mtime |
20050324235959.9 |
title
(primary) (eng) |
FPGA modelling for high-performance algorithms. Abstract |
specification |
|
serial |
title
|
FPGA 2004 ACM/SIGDA Twelfth International Symposium on Field-Programmable Gate Arrays |
page_num |
251 |
ISBN |
1-58113-829-6 |
publisher |
place |
Monterey |
name |
ACM |
year |
2004 |
|
|
keyword |
FPGA |
keyword |
timing-driven algorithms |
author
(primary) |
ARLID |
cav_un_auth*0101077 |
name1 |
Daněk |
name2 |
Martin |
institution |
UTIA-B |
fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
author
|
name1 |
Kolář |
name2 |
J. |
country |
CZ |
ARLID |
cav_un_auth*0021070 |
|
COSATI |
09G |
COSATI |
09H |
cas_special |
project |
project_id |
GA102/04/2137 |
agency |
GA ČR |
ARLID |
cav_un_auth*0004198 |
|
research |
CEZ:AV0Z1075907 |
abstract
(eng) |
The poster deals with topological modelling of FPGA circuits for timing-driven algorithms. It presents a method for analysing and deriving topological placement/routing models from architectural description of existing FPGAs. |
action |
ARLID |
cav_un_auth*0129843 |
name |
FPGA 2004 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays /12./ |
place |
Monterey |
dates |
22.02.2004-24.02.2004 |
country |
US |
|
reportyear |
2005 |
RIV |
JC |
permalink |
http://hdl.handle.net/11104/0013402 |
ID_orig |
UTIA-B 20040030 |
arlyear |
2004 |
mrcbU63 |
FPGA 2004 ACM/SIGDA Twelfth International Symposium on Field-Programmable Gate Arrays 1-58113-829-6 251 Monterey ACM 2004 |
mrcbU67 |
Tessier R. 340 |
mrcbU67 |
Schmidt H. 340 |
|