| bibtype |
C -
Conference Paper (international conference)
|
| ARLID |
0106234 |
| utime |
20240103173127.0 |
| mtime |
20050324235959.9 |
| title
(primary) (eng) |
Reconfigurable system-on-a-programmable-chip platform |
| specification |
|
| serial |
| title
|
Proceedings of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems |
| page_num |
21-28 |
| ISBN |
80-969117-9-1 |
| publisher |
| place |
Bratislava |
| name |
Institute of Informatics SAS |
| year |
2004 |
|
|
| title
(cze) |
Rekonfigurovatelná SOPC platforma |
| keyword |
reconfigurable hardware |
| keyword |
system-on-chip |
| keyword |
methodology |
| author
(primary) |
| ARLID |
cav_un_auth*0101077 |
| name1 |
Daněk |
| name2 |
Martin |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0108102 |
| name1 |
Honzík |
| name2 |
Petr |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0101120 |
| name1 |
Kadlec |
| name2 |
Jiří |
| institution |
UTIA-B |
| full_dept |
Department of Signal Processing |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0101159 |
| name1 |
Matoušek |
| name2 |
Rudolf |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0101179 |
| name1 |
Pohl |
| name2 |
Zdeněk |
| institution |
UTIA-B |
| full_dept |
Department of Signal Processing |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| COSATI |
09G |
| COSATI |
09H |
| cas_special |
| project |
| project_id |
IST-2001-34016 |
| agency |
Commission EU |
| country |
XE |
| ARLID |
cav_un_auth*0200683 |
|
| project |
| project_id |
GA102/04/2137 |
| agency |
GA ČR |
| ARLID |
cav_un_auth*0004198 |
|
| research |
CEZ:AV0Z1075907 |
| abstract
(eng) |
This paper presents an universal reconfigurable SOPC platform based on a combination of the Atmel AT94K FPSLIC device and an external memory. The presented platform increases the power of the FPSLIC device both by extending the internal address space through an introduction of a virtual program memory and by providing a transparent infrastructure for FPGA reconfiguration. The platform is demonstrated on two simple designs that demonstrate both aspects. |
| abstract
(cze) |
Tento článek prezentuje univerzální rekonfigurovatelnou SOPC platformu postavenou na kombinaci čipu Atmel AT94K FPSLIC a externí paměti. Prezentovaná platforma rozšiřuje možnosti zařízení FPSLIC pomocí zvětšení interního adresního prostoru využitím virtuální programové paměti a vytvořením transparentní infrastruktury pro rekonfiguraci FPGA obvodů. Platforma je demonstrována na dvou jednoduchých příkladech |
| action |
| ARLID |
cav_un_auth*0129851 |
| name |
IEEE Workshop on DDECS 2004 /7./ |
| place |
Stará Lesná |
| dates |
18.04.2004-21.04.2004 |
| country |
SK |
|
| reportyear |
2005 |
| RIV |
JC |
| permalink |
http://hdl.handle.net/11104/0013416 |
| ID_orig |
UTIA-B 20040045 |
| arlyear |
2004 |
| mrcbU63 |
Proceedings of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems 80-969117-9-1 21 28 Bratislava Institute of Informatics SAS 2004 |
| mrcbU67 |
Peng Z. 340 |
| mrcbU67 |
Fischerová M. 340 |
| mrcbU67 |
Gramatová E. 340 |
|