bibtype	C - Conference Paper (international conference)
ARLID	0106326
utime	20240103173135.6
mtime	20050324235959.9
title (primary) (eng)	Using logarithmic arithmetic to implement the Recursive Least Squares (QR) algorithm in FPGA
specification	page_count 3 s.
serial	title Field-Programmable Logic and Applications. 14th International Conference FPL 2004. Proceedings page_num 1149-1151 ISBN 3-540-22989-2 publisher place Berlin name Springer year 2004
title (cze)	Použití logaritmické aritmetiky pro implementaci výpočtu rekurzivních nejmenších čtverců v FPGA obvodu
keyword	QR update
keyword	FPGA
keyword	logarithmic arithmetic
author (primary)	ARLID cav_un_auth*0101190 name1 Schier name2 Jan institution UTIA-B full_dept Department of Image Processing fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
author	ARLID cav_un_auth*0101105 name1 Heřmánek name2 Antonín institution UTIA-B fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
COSATI	09J
cas_special	project project_id LN00B096 agency GA MŠk ARLID cav_un_auth*0027922 project project_id 1ET400750408 agency GA AV ČR ARLID cav_un_auth*0001798 project project_id 1ET300750402 agency GA AV ČR ARLID cav_un_auth*0001795 research CEZ:AV0Z1075907 abstract (eng) In this paper, an FPGA implementation of the QR update algorithm with Givens rotations using the High Speed Logarithmic Arithmetic (HSLA) library is outlined. An advantage of this approach is low latency and accurate computation (comparable with single-precision floating point) of the operations. abstract (cze) V článku je popsána FPGA implementace algoritmu pro QR aktualizaci pomocí Givensových rotací s použitím High Speed Logarithmic Arithmetic (HSLA) aritmetické knihovny. Výhodou tohoto způsobu implementace je malá latence výpočtu a dostatečná přesnost operací (srovnatelná s výpočty v plovoucí řádové čárce s jednoduchou přesností) action ARLID cav_un_auth*0129894 name International Conference FPL 2004 /14./ place Antverp dates 30.08.2004-01.09.2004 country BE reportyear 2005 RIV BD permalink http://hdl.handle.net/11104/0013508 ID_orig UTIA-B 20040138 arlyear 2004 mrcbU63 Field-Programmable Logic and Applications. 14th International Conference FPL 2004. Proceedings 3-540-22989-2 1149 1151 Berlin Springer 2004 Lecture Notes in Computer Science. 3203 mrcbU67 Becker J. 340 mrcbU67 Platzner M. 340 mrcbU67 Vernalde S. 340