| bibtype |
L4 -
Prototype, methodology, f. module, software
|
| ARLID |
0315466 |
| utime |
20240103190732.4 |
| mtime |
20081127235959.9 |
| title
(primary) (cze) |
Aplikační příručka k vývojové desce Uni1P a modulům DX64 |
| publisher |
|
| title
(eng) |
Application handbook for the Uni1P development board and for the DX64 modules |
| keyword |
image processing |
| keyword |
FPGA |
| keyword |
acceleration |
| author
(primary) |
| ARLID |
cav_un_auth*0225750 |
| name1 |
Kloub |
| name2 |
Jan |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| cas_special |
| project |
| project_id |
1ET400750408 |
| agency |
GA AV ČR |
| ARLID |
cav_un_auth*0001798 |
|
| research |
CEZ:AV0Z10750506 |
| abstract
(cze) |
Dokument popisuje architekturu karty Uni1P a akceleračních modulů DX64 a způsob jejich využití. Je popsán způsob návrhu aplikací pro platformu využívající tuto kartu a její moduly. V dokumentu je podrobně vysvětlen mechanismus zavedení kódu do modulů a detaily komunikace mezi DSP procesorem a FPGA obvodem,obsaženými na modulu DX64. Součástí dokumentu je popis implementované aplikace pro hranovou detekci obrazu s pou6it9m Sobelova filtru. |
| abstract
(eng) |
The architecture and use of the Uni1P board and of acceleration modules DX64 are discussed in the document. Application design methodology for the platform using this board and its modules is described. The boot mechanism and the details of communication between the DSP processor and the FPGA circuit, both contained at the DX64 module, are explained thoroughly. The document is concluded by description of the attached demo implementation of edge detection using the Sobel filter. |
| reportyear |
2009 |
| RIV |
JD |
| permalink |
http://hdl.handle.net/11104/0165661 |
| arlyear |
2008 |
| mrcbU10 |
2008 |
|