| bibtype |
L -
Prototype, methodology, f. module, software
|
| ARLID |
0331484 |
| utime |
20240103192308.5 |
| mtime |
20091112235959.9 |
| title
(primary) (eng) |
Demonstrator of Floating Point Accelerators bce_fp01_1x1_0_plbw_v1_1|10|20|30_a Kit: Xilinx Spartan-3AN OS: petalinux-v0.40-final |
| publisher |
|
| title
(cze) |
Demonstrator akcelertoruů s aritmetikou v plovoucí řádové čárce bce_fp01_1x1_0_plbw_v1_1|10|20|30_a Karta: Xilinx Spartan-3AN operační systém: petalinux-v0.40-final |
| keyword |
Nonvolatile Field Programable Gate Array |
| keyword |
Embedded uCLinux |
| keyword |
Floating point accelerator |
| author
(primary) |
| ARLID |
cav_un_auth*0101120 |
| name1 |
Kadlec |
| name2 |
Jiří |
| institution |
UTIA-B |
| full_dept |
Department of Signal Processing |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| cas_special |
| project |
| project_id |
2C06008 |
| agency |
GA MŠk |
| ARLID |
cav_un_auth*0217826 |
|
| project |
| project_id |
1M0567 |
| agency |
GA MŠk |
| country |
CZ |
| ARLID |
cav_un_auth*0202350 |
|
| research |
CEZ:AV0Z10750506 |
| abstract
(eng) |
This application note describes HW demonstrator of three floating point accelerators bce_fp01_1x1_0_plbw_v1_|10|20|30|_a. Accelerators are reconfigurable by change of firmware. Accelerators are compatible with PLB_v46 bus of Xilinx MicroBlaze soft-core processor on Spartan 3an FPGA. Demonstrator supports Ethernet point-to point connectivity and boot from on board parallel FLASH. A nonvolatile internal FLASH of the XC3S700AN-4FGG484C FPGA is used for the power-up initialization of the FPGA chip located on the Xilinx Spartan-3AN starter kit. |
| abstract
(cze) |
Funkční vzorek demonstruje 3 akcelerátory v plovoucí řádové čárce bce_fp01_1x1_0_plbw_v1_|10|20|30|_a. Akceleratory jsou rekonfigurovatelné pomocí změny programového vybavení za běhu aplikace. Akcelerátory jsou kompatibilní s PLB_v46 sběrnicí Xilinx MicroBlaze procesoru v Spartan 3an FPGA obvodu. Demonstrátor podporuje přímé Ethernet pspojení mezi s PC and inicializaci z paralelní FLASH paměti na desce s tištěnými spoji. Funkční vzorek používá pro obvodovou inicializaci interní FLASH pamět obvodu XC3S700AN-4FGG484C FPGA na prototypové desce firmy Xilinx Spartan-3S700AN. |
| reportyear |
2010 |
| RIV |
JC |
| permalink |
http://hdl.handle.net/11104/0176984 |
| arlyear |
2009 |
| mrcbU10 |
2009 |
|