bibtype |
L -
Prototype, methodology, f. module, software
|
ARLID |
0333688 |
utime |
20240103192524.2 |
mtime |
20091215235959.9 |
title
(primary) (eng) |
Floating Point Accelerator Families bce_fp01_1x1_0_plbw_v1_|10|20|30|_a bce_fp01_1x2_0_plbw_v1_|10|20|30|40|_a for Xilinx Spartan3 DSP 1800 Board and Petalogix Petalinux-v0.40-final |
publisher |
|
title
(cze) |
Demonstrator akcelertorů s aritmetikou v plovoucí řádové čárce bce_fp01_1x1_0_plbw_v1_1|10|20|30_a a bce_fp01_1x2_0_plbw_v1_1|10|20|30|40_a pro Xilinx Spartan3 DSP 1800 a operační systém petalinux-v0.40-final |
keyword |
Nonvolatile Field Programable Gate Array |
keyword |
Embedded uCLinux |
keyword |
Floating point accelerator |
author
(primary) |
ARLID |
cav_un_auth*0101120 |
name1 |
Kadlec |
name2 |
Jiří |
institution |
UTIA-B |
full_dept |
Department of Signal Processing |
fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
cas_special |
project |
project_id |
1M0567 |
agency |
GA MŠk |
country |
CZ |
ARLID |
cav_un_auth*0202350 |
|
project |
project_id |
027611 |
agency |
EC |
country |
XE |
agency |
EC |
ARLID |
cav_un_auth*0225974 |
|
research |
CEZ:AV0Z10750506 |
abstract
(eng) |
This application note describes parameters and use of an HW demonstrator, designed to demonstrate two floating point accelerator families designed in UTIA. Pre-installed system demonstrates use of four instances of bce_fp01_1x2_|0|1|2|3|_plbw_v1_40_a accelerator on PLB_v46 bus of the Xilinx MicroBlaze soft-core processor on Spartan 3a_dsp FPGA. |
abstract
(cze) |
Demonstrátor dokladuje parametry a použití dvou rodin akcelerátorů výpočtu v plovoucí řádové čárce na obvodu FPGA 3SD1800a. |
reportyear |
2010 |
RIV |
JC |
permalink |
http://hdl.handle.net/11104/0178620 |
arlyear |
2009 |
mrcbU10 |
2009 |
|