| bibtype |
L -
Prototype, methodology, f. module, software
|
| ARLID |
0338662 |
| utime |
20240103193047.0 |
| mtime |
20100219235959.9 |
| title
(primary) (eng) |
Graphic Computing Element Description |
| publisher |
|
| keyword |
image processing |
| keyword |
reconfiguration |
| keyword |
hardware object |
| keyword |
FPGA |
| author
(primary) |
| ARLID |
cav_un_auth*0225750 |
| name1 |
Kloub |
| name2 |
Jan |
| full_dept (cz) |
Zpracování signálů |
| full_dept (eng) |
Department of Signal Processing |
| department (cz) |
ZS |
| department (eng) |
ZS |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| cas_special |
| project |
| project_id |
7H09005 |
| agency |
GA MŠk |
| ARLID |
cav_un_auth*0253180 |
|
| research |
CEZ:AV0Z10750506 |
| abstract
(eng) |
The paper presents an implementation of a graphic computing element (GCE) which can be used as a runtime parametrized building block in image processing applications in FPGAs. |
| reportyear |
2010 |
| RIV |
JC |
| permalink |
http://hdl.handle.net/11104/0182383 |
| arlyear |
2010 |
| mrcbU10 |
2010 |
|