bibtype C - Conference Paper (international conference)
ARLID 0342300
utime 20240111140739.1
mtime 20100423235959.9
title (primary) (eng) Blind image deconvolution algorithm on NVIDIA CUDA platform
specification
page_count 2 s.
media_type www
serial
ARLID cav_un_epca*0342299
ISBN 978-1-4244-6610-8
title Proceedings of the 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems
page_num 125-126
publisher
place Vienna
name Institute of Electrical and Electronics Engineers
year 2010
keyword convolution
keyword CUDA
keyword SIMD
keyword HW implementation
author (primary)
ARLID cav_un_auth*0202597
name1 Mazanec
name2 Tomáš
full_dept (cz) Zpracování signálů
full_dept (eng) Department of Signal Processing
department (cz) ZS
department (eng) ZS
institution UTIA-B
fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
author
ARLID cav_un_auth*0101105
name1 Heřmánek
name2 Antonín
full_dept (cz) Zpracování signálů
full_dept Department of Signal Processing
department (cz) ZS
department ZS
institution UTIA-B
fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
author
ARLID cav_un_auth*0213251
name1 Kamenický
name2 Jan
full_dept (cz) Zpracování obrazové informace
full_dept Department of Image Processing
department (cz) ZOI
department ZOI
institution UTIA-B
full_dept Department of Image Processing
fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
source
source_type pdf
url http://library.utia.cas.cz/separaty/2010/ZS/mazanec-blind image deconvolution algorithm on nvidia cuda platform.pdf
cas_special
project
project_id 7H09005
agency GA MŠk
ARLID cav_un_auth*0253180
research CEZ:AV0Z10750506
abstract (eng) Advanced image processing algorithms usually require high computing performance. Today's personal computers (PCs) offer satisfying resources for implementation of image processing tasks. However, as the image processing techniques are becoming more and more complex other implementation possibilities have to be searched. Since image processing algorithms usually comply with the Single Instruction Multiple Data (SIMD) model, implementation efforts using such hardware resources are suitable. An example of the SIMD hardware component available nowadays is the graphics processor (GPU) embedded in modern graphics cards manufactured for PCs. In this paper, the implementation of a blind image deconvolution algorithm using graphics processor as the SIMD computing resource is presented. The resulting performance is compared to the performance achieved on a common general-purpose processor (CPU).
action
ARLID cav_un_auth*0261515
name The 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems
place Vienna
dates 14.04.2010-16.04.2010
country AT
reportyear 2011
RIV JC
permalink http://hdl.handle.net/11104/0185066
arlyear 2010
mrcbU56 pdf
mrcbU63 cav_un_epca*0342299 Proceedings of the 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems 978-1-4244-6610-8 125 126 Proceedings of the 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems Vienna Institute of Electrical and Electronics Engineers 2010