bibtype C - Conference Paper (international conference)
ARLID 0363714
utime 20240103195455.9
mtime 20110913235959.9
title (primary) (eng) Microthreading as a Novel Method for Close Coupling of Custom Hardware Accelerators to SVP Processors
specification
page_count 8 s.
serial
ARLID cav_un_epca*0363713
ISBN 978-0-7695-4494-6
ISSN N
title 2011 14th Euromicro Conference on Digital System Design Architectures, Methods and Tools DSD 2011
page_num 525-532
publisher
place Oulu, Finsko
name IEEE Computer Society Conference Publishing Services
year 2011
editor
name1 Kitsos
name2 Paris
keyword microthreading
keyword SVP concurrency model
keyword UTLEON3 processor
author (primary)
ARLID cav_un_auth*0261496
name1 Sýkora
name2 Jaroslav
full_dept (cz) Zpracování signálů
full_dept (eng) Department of Signal Processing
department (cz) ZS
department (eng) ZS
institution UTIA-B
fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
author
ARLID cav_un_auth*0202863
name1 Kafka
name2 Leoš
full_dept (cz) Zpracování signálů
full_dept Department of Signal Processing
department (cz) ZS
department ZS
institution UTIA-B
fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
author
ARLID cav_un_auth*0101077
name1 Daněk
name2 Martin
full_dept (cz) Zpracování signálů
full_dept Department of Signal Processing
department (cz) ZS
department ZS
institution UTIA-B
fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
author
ARLID cav_un_auth*0225749
name1 Kohout
name2 Lukáš
full_dept (cz) Zpracování signálů
full_dept Department of Signal Processing
department (cz) ZS
department ZS
institution UTIA-B
full_dept Department of Signal Processing
fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
source
url http://library.utia.cas.cz/separaty/2011/ZS/sykora-microthreading as a novel method for close coupling of custom hardware accelerators to svp processors.pdf
cas_special
project
project_id 7E08013
agency GA MŠk
ARLID cav_un_auth*0254219
research CEZ:AV0Z10750506
abstract (eng) We present a new low-level interfacing scheme for connecting custom accelerators to processors that tolerates latencies that usually occur when accessing hardware accelerators from software. The scheme is based on the Self-adaptive Virtual Processor (SVP) architecture and on the micro-threading concept. Our presentation is based on a sample implementation of the SVP architecture in an extended version of the LEON3 processor called UTLEON3. The SVP concurrency paradigm makes data dependencies explicit in the dynamic tree of threads. This enables a system to execute threads concurrently in different processor cores. Previous SVP work presumed the cores are homogeneous, for example an array of microthreaded processors sharing a dynamic pool of microthreads. In this work we propose a heterogeneous system of general-purpose processor cores and custom hardware accelerators. The accelerators dynamically pick families of threads from the pool and execute them concurrently.
action
ARLID cav_un_auth*0274090
name 14th Euromicro Conference on Digital System Design Architectures, Methods and Tools DSD 2011
place Oulu
dates 31.08.2011-02.09.2011
country FI
reportyear 2012
RIV JC
num_of_auth 4
permalink http://hdl.handle.net/11104/0199416
arlyear 2011
mrcbU63 cav_un_epca*0363713 2011 14th Euromicro Conference on Digital System Design Architectures, Methods and Tools DSD 2011 978-0-7695-4494-6 N 525 532 Oulu, Finsko IEEE Computer Society Conference Publishing Services 2011
mrcbU67 Kitsos Paris 340