| bibtype |
L -
Prototype, methodology, f. module, software
|
| ARLID |
0380874 |
| utime |
20240103201234.0 |
| mtime |
20121011235959.9 |
| title
(primary) (eng) |
Foreground Detection and Image Segmentation in a Flexible ASVP Platform for FPGAs |
| publisher |
|
| keyword |
smart camera |
| keyword |
video surveillance |
| keyword |
vector processing |
| keyword |
FPGA |
| author
(primary) |
| ARLID |
cav_un_auth*0202591 |
| name1 |
Bartosinski |
| name2 |
Roman |
| full_dept (cz) |
Zpracování signálů |
| full_dept (eng) |
Department of Signal Processing |
| department (cz) |
ZS |
| department (eng) |
ZS |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0101077 |
| name1 |
Daněk |
| name2 |
Martin |
| full_dept (cz) |
Zpracování signálů |
| full_dept |
Department of Signal Processing |
| department (cz) |
ZS |
| department |
ZS |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0261496 |
| name1 |
Sýkora |
| name2 |
Jaroslav |
| full_dept (cz) |
Zpracování signálů |
| full_dept |
Department of Signal Processing |
| department (cz) |
ZS |
| department |
ZS |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0225749 |
| name1 |
Kohout |
| name2 |
Lukáš |
| full_dept (cz) |
Zpracování signálů |
| full_dept |
Department of Signal Processing |
| department (cz) |
ZS |
| department |
ZS |
| institution |
UTIA-B |
| full_dept |
Department of Signal Processing |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| cas_special |
| project |
| project_id |
7H10001 |
| agency |
GA MŠk |
| country |
CZ |
| ARLID |
cav_un_auth*0272880 |
|
| project |
| project_id |
JU 100230 |
| agency |
Artemis JU |
| country |
XE |
|
| abstract
(eng) |
This demonstration shows an early prototype of low-level image processing to be used in an embedded smart camera, that is foreground detection and image segmentation. The example uses camera with resolution 640x480 pixels for input images processed at 100MHz in the FPGA. The input can be easily extended to higher resolutions. The processed output is displayed on LCD screen. |
| reportyear |
2013 |
| RIV |
JC |
| permalink |
http://hdl.handle.net/11104/0211478 |
| arlyear |
2012 |
| mrcbU10 |
2012 |
|