| bibtype |
J -
Journal Article
|
| ARLID |
0408909 |
| utime |
20240103182035.4 |
| mtime |
20060210235959.9 |
| title
(primary) (eng) |
Chaos synthesis via Root Locus |
| serial |
| ARLID |
cav_un_epca*0256720 |
| ISSN |
1057-7122 |
| title
|
IEEE Transaction on Circuits and Systems |
| volume_id |
41 |
| volume |
1 (1994) |
| page_num |
59-60 |
|
| author
(primary) |
| ARLID |
cav_un_auth*0101220 |
| name1 |
Vaněček |
| name2 |
Antonín |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0101074 |
| name1 |
Čelikovský |
| name2 |
Sergej |
| institution |
UTIA-B |
| full_dept |
Department of Control Theory |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| cas_special |
| project |
| project_id |
102/94/0053 |
| agency |
GA ČR |
| ARLID |
cav_un_auth*0212025 |
|
| department |
ŘRPP, TŘ |
| permalink |
http://hdl.handle.net/11104/0129011 |
| ID_orig |
UTIA-B 940147 |
| arlyear |
1994 |
| mrcbU63 |
cav_un_epca*0256720 IEEE Transaction on Circuits and Systems 1057-7122 Roč. 41 č. 1 1994 59 60 |
|