bibtype A - Abstract
ARLID 0408944
utime 20240103182037.6
mtime 20060210235959.9
title (primary) (eng) A systolic algorithm for the block-regularized RLS identification. Abstract
publisher
place Leuven
name Katholieke Universiteit
pub_time 1994
serial
title Algorithms and Parallel VLSI Architectures. Abstracts
page_num -
author (primary)
ARLID cav_un_auth*0101190
name1 Schier
name2 Jan
institution UTIA-B
full_dept Department of Image Processing
fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
cas_special
project
project_id 102/93/0897
agency GA ČR
ARLID cav_un_auth*0211931
action
ARLID cav_un_auth*0212041
name International Workshop on Algorithms and Parallel VLSI Architectures /3./
place Leuven
country BE
dates 29.08.1994-31.08.1994
department AS
permalink http://hdl.handle.net/11104/0129046
ID_orig UTIA-B 940182
arlyear 1994
mrcbU10 1994
mrcbU10 Leuven Katholieke Universiteit
mrcbU63 Algorithms and Parallel VLSI Architectures. Abstracts s.