| bibtype |
J -
Journal Article
|
| ARLID |
0409292 |
| utime |
20240103182058.8 |
| mtime |
20060210235959.9 |
| title
(primary) (eng) |
A systolic algorithm for block-regularized RLS identification |
| serial |
| ARLID |
cav_un_epca*0256760 |
| ISSN |
0167-9260 |
| title
|
Integration, the VLSI Journal |
| volume_id |
20 |
| page_num |
85-100 |
| publisher |
|
|
| author
(primary) |
| ARLID |
cav_un_auth*0101190 |
| name1 |
Schier |
| name2 |
Jan |
| institution |
UTIA-B |
| full_dept |
Department of Image Processing |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| source |
|
| COSATI |
09I |
| cas_special |
| project |
| project_id |
102/95/1614 |
| agency |
GA ČR |
| ARLID |
cav_un_auth*0212163 |
|
| project |
| project_id |
102/95/0926 |
| agency |
GA ČR |
| ARLID |
cav_un_auth*0212164 |
|
| department |
ZS |
| permalink |
http://hdl.handle.net/11104/0129389 |
| ID_orig |
UTIA-B 960040 |
| arlyear |
1995 |
| mrcbU63 |
cav_un_epca*0256760 Integration, the VLSI Journal 0167-9260 1872-7522 Roč. 20 - 1995 85 100 Elsevier |
|