| bibtype |
C -
Conference Paper (international conference)
|
| ARLID |
0410642 |
| utime |
20240103182228.6 |
| mtime |
20060210235959.9 |
| ISBN |
3-540-42499-7 |
| title
(primary) (eng) |
Implementation of (Normalised) RLS Lattice on Virtex |
| publisher |
| place |
Berlin |
| name |
Springer |
| pub_time |
2001 |
|
| specification |
|
| edition |
| name |
Lecture Notes in Computer Science. |
| volume_id |
2147 |
|
| serial |
| title
|
Field-Programmable Logic and Applications. Proceedings |
| page_num |
91-100 |
| editor |
|
| editor |
|
|
| keyword |
field programmable gate array |
| author
(primary) |
| ARLID |
cav_un_auth*0212813 |
| name1 |
Albu |
| name2 |
F. |
| country |
IE |
|
| author
|
| ARLID |
cav_un_auth*0101120 |
| name1 |
Kadlec |
| name2 |
Jiří |
| institution |
UTIA-B |
| full_dept |
Department of Signal Processing |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0212755 |
| name1 |
Softley |
| name2 |
Ch. |
| country |
GB |
|
| author
|
| ARLID |
cav_un_auth*0101159 |
| name1 |
Matoušek |
| name2 |
Rudolf |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0101105 |
| name1 |
Heřmánek |
| name2 |
Antonín |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0212571 |
| name1 |
Coleman |
| name2 |
J. N. |
| country |
GB |
|
| author
|
| ARLID |
cav_un_auth*0212814 |
| name1 |
Fagan |
| name2 |
A. |
| country |
IE |
|
| COSATI |
09G |
| COSATI |
09J |
| cas_special |
| project |
| project_id |
HSLA 33544 |
| agency |
ESPRIT |
| country |
XE |
|
| research |
AV0Z1075907 |
| abstract
(eng) |
The LNS implementation of the LRLS algorithms in a FPGA offers better speed than C30/C40 DSP floating-point and provides low-cost, efficient solution for different system-on-chip applications. The resulting RLS Lattice cores operate with 24-bit precision fixed-point input/output signals. Therefore, the internal conversion to the log domain and the internal LNS operation can be hidden from the user. This presented work provides significant speedup without any loss of precision. |
| action |
| ARLID |
cav_un_auth*0212815 |
| name |
International Conference FPL 2001 |
| place |
Belfast |
| country |
IE |
| dates |
27.08.2001-29.08.2001 |
|
| RIV |
JC |
| department |
ZS |
| permalink |
http://hdl.handle.net/11104/0130730 |
| ID_orig |
UTIA-B 20010111 |
| arlyear |
2001 |
| mrcbU10 |
2001 |
| mrcbU10 |
Berlin Springer |
| mrcbU12 |
3-540-42499-7 |
| mrcbU63 |
Field-Programmable Logic and Applications. Proceedings 91 100 |
| mrcbU67 |
Brebner G. 340 |
| mrcbU67 |
Woods R. 340 |
|