bibtype V - Research Report
ARLID 0410729
utime 20240103182235.2
mtime 20060210235959.9
title (primary) (eng) Implementation of Normalized RLS Lattice on Virtex
publisher
place Praha
name ÚTIA AV ČR
pub_time 2001
specification
page_count 10 s.
edition
name Research Report
volume_id 2040
keyword digital signal processing
keyword FPGA
keyword floating point
author (primary)
ARLID cav_un_auth*0212813
name1 Albu
name2 F.
country IE
author
ARLID cav_un_auth*0101120
name1 Kadlec
name2 Jiří
institution UTIA-B
full_dept Department of Signal Processing
fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
author
ARLID cav_un_auth*0212755
name1 Softley
name2 Ch.
country GB
author
ARLID cav_un_auth*0101159
name1 Matoušek
name2 Rudolf
institution UTIA-B
fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
author
ARLID cav_un_auth*0101105
name1 Heřmánek
name2 Antonín
institution UTIA-B
fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
COSATI 09G
COSATI 09H
cas_special
project
project_id HSLA 33544
agency ESPRIT
country XE
project
project_id LN00B096
agency GA MŠk
ARLID cav_un_auth*0027922
research AV0Z1075907
RIV JC
department ZS
permalink http://hdl.handle.net/11104/0130817
ID_orig UTIA-B 20010198
arlyear 2001
mrcbU10 2001
mrcbU10 Praha ÚTIA AV ČR