bibtype	V - Research Report
ARLID	0411001
utime	20240103182254.7
mtime	20060210235959.9
title (primary) (eng)	Logarithmic Arithmetic for Real Data Types and Support for MATLAB/SIMULINK Based Rapid-FPGA-Prototyping
publisher	place Praha name ÚTIA AV ČR pub_time 2002
specification	page_count 7 s.
edition	name Research Report volume_id 2069
keyword	rapid prototyping for FPGA
keyword	MATLAB/Simulink
author (primary)	ARLID cav_un_auth*0101152 name1 Líčko name2 Miroslav institution UTIA-B fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
author	ARLID cav_un_auth*0101190 name1 Schier name2 Jan institution UTIA-B full_dept Department of Image Processing fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
author	ARLID cav_un_auth*0101179 name1 Pohl name2 Zdeněk institution UTIA-B full_dept Department of Signal Processing fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
author	ARLID cav_un_auth*0101120 name1 Kadlec name2 Jiří institution UTIA-B full_dept Department of Signal Processing fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
author	ARLID cav_un_auth*0101213 name1 Tichý name2 Milan institution UTIA-B fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
author	ARLID cav_un_auth*0101159 name1 Matoušek name2 Rudolf institution UTIA-B fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
author	ARLID cav_un_auth*0101105 name1 Heřmánek name2 Antonín institution UTIA-B fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
COSATI	09G
COSATI	09H
cas_special	project project_id LN00B096 agency GA MŠk ARLID cav_un_auth*0027922 research CEZ:AV0Z1075907 RIV JC department ZS permalink http://hdl.handle.net/11104/0131088 ID_orig UTIA-B 20020215 arlyear 2002 mrcbU10 2002 mrcbU10 Praha ÚTIA AV ČR