bibtype |
E -
Electronic Document
|
ARLID |
0411205 |
utime |
20240111140636.3 |
mtime |
20060210235959.9 |
title
(primary) (eng) |
An Introduction to the Xilinx System Generator. (Program) |
publisher |
place |
Praha |
name |
ÚTIA AV ČR |
pub_time |
2003 |
|
specification |
|
keyword |
FPGA |
keyword |
rapid prototyping |
keyword |
design methodology |
author
(primary) |
ARLID |
cav_un_auth*0101152 |
name1 |
Líčko |
name2 |
Miroslav |
institution |
UTIA-B |
fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
author
|
ARLID |
cav_un_auth*0101120 |
name1 |
Kadlec |
name2 |
Jiří |
institution |
UTIA-B |
full_dept |
Department of Signal Processing |
fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
source |
source_type |
program |
source_size |
67.3 MB |
|
COSATI |
09G |
COSATI |
09H |
cas_special |
project |
project_id |
LN00B096 |
agency |
GA MŠk |
ARLID |
cav_un_auth*0027922 |
|
research |
CEZ:AV0Z1075907 |
abstract
(eng) |
The CD contains illustrative examples prepared to present philosophy of Xilinx System Generator, which is a new block set of MATLAB/Simulink to support FPGA implementations. |
RIV |
JC |
department |
ZS |
permalink |
http://hdl.handle.net/11104/0131291 |
ID_orig |
UTIA-B 20030192 |
arlyear |
2003 |
mrcbU10 |
2003 |
mrcbU10 |
Praha ÚTIA AV ČR |
mrcbU56 |
program 67.3 MB |
|