| bibtype |
J -
Journal Article
|
| ARLID |
0411279 |
| utime |
20240103182314.9 |
| mtime |
20060210235959.9 |
| title
(primary) (cze) |
FPGA implementace LMS a N-LMS algoritmu pro potlačení akustického echa |
| specification |
|
| serial |
| ARLID |
cav_un_epca*0297203 |
| ISSN |
1212-4702 |
| title
|
Akustické listy |
| volume_id |
10 |
| volume |
4 (2004) |
| page_num |
9-13 |
|
| title
(eng) |
The FPGA implementation of LMS and N-LMS of echo canceller. |
| keyword |
FPGA |
| keyword |
LMS algorithm |
| keyword |
Handel-C |
| author
(primary) |
| ARLID |
cav_un_auth*0202597 |
| name1 |
Mazanec |
| name2 |
Tomáš |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0213152 |
| name1 |
Brothánek |
| name2 |
M. |
| country |
CZ |
|
| COSATI |
090 |
| cas_special |
| research |
CEZ:AV0Z1075907 |
| abstract
(cze) |
Cílem práce bylo implementovat metodu kompenzace echa na platformě programovatelného obvodu FPGA. Řešení zahrnuje jak praktické využití adaptivní filtrace, tak implementaci zadané úlohy do HW podoby. |
| abstract
(eng) |
This article describes implementation of echo canceller on a FPGA programmable device (Xilinx, Virtex), which was done. The solution of this adaptive filtering task was aimed to least squares algorithms, especially to the LMS and normalized LMS algorithm. Used digital filterswere the type of finite impulse response in transveral structure. The FPGA implementation was created in Handel-C of DK 2.0 system which is designed to rapis prototyping flow. |
| RIV |
JC |
| reportyear |
2006 |
| department |
ZS |
| permalink |
http://hdl.handle.net/11104/0131362 |
| ID_orig |
UTIA-B 20050006 |
| arlyear |
2004 |
| mrcbU63 |
cav_un_epca*0297203 Akustické listy 1212-4702 Roč. 10 č. 4 2004 9 13 |
|