bibtype C - Conference Paper (international conference)
ARLID 0411373
utime 20240103182322.5
mtime 20060210235959.9
ISBN 90-382-0802-2
title (primary) (eng) GIN - notetaker for blind people: An example of using dynamic reconfiguration of FPGAs
publisher
place Ghent
name HiPEAC Network of Excellence
pub_time 2005
specification
page_count 4 s.
serial
title ACACES 2005. Advanced Computer Architecture and Compilation for Embedded Systems
page_num 15-18
editor
name1 Bosschere
name2 K.
title (cze) GIN - záznamník pro slepce: Příklad využití dynamické rekonfigurace na FPGA
keyword dynamic reconfiguration
keyword FPGA
keyword HW/SW codesign
author (primary)
ARLID cav_un_auth*0101077
name1 Daněk
name2 Martin
institution UTIA-B
fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
author
ARLID cav_un_auth*0101105
name1 Heřmánek
name2 Antonín
institution UTIA-B
fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
author
ARLID cav_un_auth*0108102
name1 Honzík
name2 Petr
institution UTIA-B
fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
author
ARLID cav_un_auth*0101120
name1 Kadlec
name2 Jiří
institution UTIA-B
full_dept Department of Signal Processing
fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
author
ARLID cav_un_auth*0101159
name1 Matoušek
name2 Rudolf
institution UTIA-B
fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
author
ARLID cav_un_auth*0101179
name1 Pohl
name2 Zdeněk
institution UTIA-B
full_dept Department of Signal Processing
fullinstit Ústav teorie informace a automatizace AV ČR, v. v. i.
COSATI 09G
COSATI 09H
cas_special
project
project_id 1M0567
agency GA MŠk
ARLID cav_un_auth*0202350
project
project_id IST-2001-34016
agency Commission EC
country XE
ARLID cav_un_auth*0200683
research CEZ:AV0Z10750506
abstract (eng) This paper describes an initial implementation of a notetaker for blind people. The implementation uses a simple SoC approach based on the Atmel FPSLIC device with dynamic reconfiguration of its FPGA part to implement low-power DSP processing necessary for compressed audio recording/playback and speech synthesis.
abstract (cze) Text popisuje základní implementaci záznamníku pro slepce. Implementace využívá jednoduchý SoC založený na obvodu Atmel FPSLIC. FPGA využívá dynamickou rekonfiguraci k implementaci low-power DSP zpracování nutného pro kompresi audiosignálu, jeho záznamu/přehrávání a hlasové syntéze.
action
ARLID cav_un_auth*0213219
name ACACES 2005.
place L'Aquila
country IT
dates 26.07.2005
RIV JC
reportyear 2006
department ZS
permalink http://hdl.handle.net/11104/0131455
ID_orig UTIA-B 20050103
arlyear 2005
mrcbU10 2005
mrcbU10 Ghent HiPEAC Network of Excellence
mrcbU12 90-382-0802-2
mrcbU63 ACACES 2005. Advanced Computer Architecture and Compilation for Embedded Systems 15 18
mrcbU67 Bosschere K. 340