| bibtype |
C -
Conference Paper (international conference)
|
| ARLID |
0411508 |
| utime |
20240111140636.6 |
| mtime |
20060210235959.9 |
| ISBN |
0-7803-9334-1 |
| title
(primary) (eng) |
Optimization of finite interval CMA implementation for FPGA |
| specification |
| page_count |
7 s. |
| media_type |
CD-ROM |
|
| serial |
| title
|
Proceedings of the IEEE Workshop on Signal Processing Systems. SiPS 2005 |
| page_num |
1-6 |
| ISBN |
0-7803-9333-3 |
| publisher |
| place |
Athens |
| name |
IEEE |
| year |
2005 |
|
|
| title
(cze) |
Optimalizace FPGA implementace FI-CMA algoritmu |
| keyword |
CMA |
| keyword |
FPGA |
| keyword |
logarithmic arithmetic |
| keyword |
cyclic scheduling |
| author
(primary) |
| ARLID |
cav_un_auth*0101105 |
| name1 |
Heřmánek |
| name2 |
Antonín |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0101190 |
| name1 |
Schier |
| name2 |
Jan |
| institution |
UTIA-B |
| full_dept |
Department of Image Processing |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0202761 |
| name1 |
Šůcha |
| name2 |
P. |
| country |
CZ |
|
| author
|
| ARLID |
cav_un_auth*0202762 |
| name1 |
Hanzálek |
| name2 |
Z. |
| country |
CZ |
|
| source |
|
| COSATI |
09J |
| COSATI |
090 |
| cas_special |
| project |
| project_id |
1ET300750402 |
| agency |
GA AV ČR |
| ARLID |
cav_un_auth*0001795 |
|
| project |
| project_id |
1M0567 |
| agency |
GA MŠk |
| ARLID |
cav_un_auth*0202350 |
|
| research |
CEZ:AV0Z10750506 |
| abstract
(eng) |
Optimization of an FPGA implementation of iterative algorithms with nested loops is treated, using Integer Linear Programming. An example of the FI-CMA blind equalization algorithm is considered, using limited (and small) number of arithmetic units with non-zero latency. The optimization is based on cyclic scheduling with precedence delays for distinct dedicated processors. An optimally scheduled abstract model is constructed, modeling imperfectly nested loops. |
| abstract
(cze) |
V článku je diskutována optimalizace FPGA implementace iterativních algoritmů s vnořenými smyčkami pomocí celočíselného lineárního programování. Metoda je demonstrována na příkladu FI-CMA algoritmu pro ekvalizaci naslepo, s použitím omezeného (a malého) počtu aritmetických jednotek s nenulovou latencí. Optimalizace využívá cyklického rozvrhování s precedenčními zpožděními jednotlivých dedikovaných procesorů. Takto je vytvořen optimálně rozvržený abstraktní model, modelující nedokonale vnořené smyčky. |
| action |
| ARLID |
cav_un_auth*0213310 |
| name |
SiPS 2005. IEEE Workshop on Signal Processing Systems |
| place |
Athens |
| country |
GR |
| dates |
02.11.2005-04.11.2005 |
|
| RIV |
BD |
| reportyear |
2010 |
| department |
ZS |
| permalink |
http://hdl.handle.net/11104/0131588 |
| arlyear |
2005 |
| mrcbU12 |
0-7803-9334-1 |
| mrcbU56 |
132 kB |
| mrcbU63 |
Proceedings of the IEEE Workshop on Signal Processing Systems. SiPS 2005 0-7803-9333-3 1 6 Athens IEEE 2005 |
|