| bibtype |
L -
Prototype, methodology, f. module, software
|
| ARLID |
0433605 |
| utime |
20240103204848.3 |
| mtime |
20150312235959.9 |
| title
(primary) (eng) |
Asymmetric Multiprocessing (AMP) on ZYNQ with EdkDSP Accelerators on Xilinx ZC702 Board - ISE 14.5 |
| publisher |
|
| keyword |
FPGA |
| keyword |
floating-point accelerator |
| keyword |
symmetrical multiprocessing |
| keyword |
ZYNQ Processing System |
| author
(primary) |
| ARLID |
cav_un_auth*0101120 |
| name1 |
Kadlec |
| name2 |
Jiří |
| full_dept (cz) |
Zpracování signálů |
| full_dept (eng) |
Department of Signal Processing |
| department (cz) |
ZS |
| department (eng) |
ZS |
| institution |
UTIA-B |
| full_dept |
Department of Signal Processing |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| source |
|
| cas_special |
| project |
| project_id |
7H14005 |
| agency |
GA MŠk |
| country |
BE |
| ARLID |
cav_un_auth*0308433 |
|
| abstract
(eng) |
This application note describes Asymmetric Multiprocessing (AMP) on ZYNQ with EdkDSP Accelerators on Xilinx ZC702 Board - ISE 14.5 based on the Xilinx application note XAPP1093. The ARM Cortex A9 processor works together with the MicroBlaze processor, sharing the terminal and block ram. Both processors execute program from the same external DDR3 memory. The MicroBlaze processor is controlling 4 EdkDSP floating point accelerators. Each accelerator is organised as 8xSIMD reconfigurable data path, controlled by the PicoBlaze6 controller. This evaluation package is provided by UTIA for the Xilinx ZC702 designs with AXI bus. This application note explains how to install and use the demonstrator on Windows7, (32 or 64 bit) and the Xilinx ZC702 board. |
| reportyear |
2015 |
| RIV |
JC |
| permalink |
http://hdl.handle.net/11104/0238371 |
| confidential |
S |
| arlyear |
2014 |
| mrcbU10 |
2014 |
|