| bibtype |
L -
Prototype, methodology, f. module, software
|
| ARLID |
0460677 |
| utime |
20240103212404.3 |
| mtime |
20160713235959.9 |
| title
(primary) (eng) |
Toshiba Video Sensor Evaluation Platform for TE0720-03-2IF SoM on TE0701-05 Carrier |
| publisher |
|
| keyword |
FPGA |
| keyword |
Full HD video sensor |
| keyword |
Zynq platform |
| author
(primary) |
| ARLID |
cav_un_auth*0101120 |
| full_dept (cz) |
Zpracování signálů |
| full_dept (eng) |
Department of Signal Processing |
| department (cz) |
ZS |
| department (eng) |
ZS |
| full_dept |
Department of Signal Processing |
| name1 |
Kadlec |
| name2 |
Jiří |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0101179 |
| full_dept (cz) |
Zpracování signálů |
| full_dept |
Department of Signal Processing |
| department (cz) |
ZS |
| department |
ZS |
| full_dept |
Department of Signal Processing |
| name1 |
Pohl |
| name2 |
Zdeněk |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0225749 |
| full_dept (cz) |
Zpracování signálů |
| full_dept |
Department of Signal Processing |
| department (cz) |
ZS |
| department |
ZS |
| full_dept |
Department of Signal Processing |
| name1 |
Kohout |
| name2 |
Lukáš |
| institution |
UTIA-B |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| source |
|
| cas_special |
| project |
| ARLID |
cav_un_auth*0306850 |
| project_id |
7H14004 |
| agency |
GA MŠk |
|
| abstract
(eng) |
This application note describes HW platform performing edge detection and motion detection video processing for Toshiba Full HD colour video sensor with fixed resolution (1920x1080p60). Arm Cortex A9 processor of Xilinx Zynq is performing initialisation and synchronisation of the video processing chain. Program and the FPGA image is downloaded to the board from the Xilinx SDK 2015.4 via USB JTAG to the 1GB DDR3 located on the Zynq system on module. System can be also started directly from the SD card. Arm processor initiates the IP cores in the programmable logic (PL) part of the Zynq. It also initiates the Toshiba video sensor and the video output to the Full HD monitor with fixed 1920x1080p60 resolution. |
| RIV |
JC |
| reportyear |
2017 |
| permalink |
http://hdl.handle.net/11104/0260696 |
| confidential |
S |
| arlyear |
2016 |
| mrcbU10 |
2016 |
|