bibtype |
L -
Prototype, methodology, f. module, software
|
ARLID |
0543785 |
utime |
20240103230006.3 |
mtime |
20210714235959.9 |
title
(primary) (eng) |
DTRiMC tool for TE0726-03M board |
publisher |
|
keyword |
System on Chip |
keyword |
Zynq |
keyword |
microprocessor |
keyword |
HW accelerated computing |
keyword |
automation |
keyword |
Linux Debian Stretch |
author
(primary) |
ARLID |
cav_un_auth*0101120 |
name1 |
Kadlec |
name2 |
Jiří |
institution |
UTIA-B |
full_dept (cz) |
Zpracování signálů |
full_dept (eng) |
Department of Signal Processing |
department (cz) |
ZS |
department (eng) |
ZS |
full_dept |
Department of Signal Processing |
fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
author
|
ARLID |
cav_un_auth*0330517 |
name1 |
Likhonina |
name2 |
Raissa |
institution |
UTIA-B |
full_dept (cz) |
Zpracování signálů |
full_dept |
Department of Signal Processing |
department (cz) |
ZS |
department |
ZS |
full_dept |
Department of Signal Processing |
country |
CZ |
fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
source |
|
cas_special |
project |
project_id |
8A18013 |
agency |
GA MŠk |
ARLID |
cav_un_auth*0374054 |
|
abstract
(eng) |
Evaluation package for the Design Time Resource integration of Model Composer DTRiMC tool. It serves for integration of 8xSIMD, FP03x8, floating-point, run-time-reconfigurable accelerator for Zynq device on TE0726-03M board. The application note describes released UTIA support for the evaluation version of SIMD FP03x8 floating point run time reconfigurable accelerator for the ZynqBerry board. ZynqBerry TE0726-03M works with Xilinx XC07010-1C device with the dual core ARM A9 32 bit, 512 MB of DDR3 memory and some programmable logic area on single 28nm chip. The ZynqBerry PCB has RaspberryPi 2 form factor. The ZynqBerry board is designed and manufactured by company Trenz Electronic. SW developer can program “main” applications without SDSoC 2018.2 compiler license with the g++ compiler in Xilinx SDK on Win 10 PC. “make” can be used directly on A9 processor. The accelerator and HW data communication is represented for the SW developer as shared C++ library with simple SW API, identical for several alternative HW data movers. The FP03x8 HW accelerator serves for run-time reprogrammable 8xSIMD single precision floating point computations. |
RIV |
JC |
FORD0 |
20000 |
FORD1 |
20200 |
FORD2 |
20206 |
reportyear |
2022 |
num_of_auth |
2 |
permalink |
http://hdl.handle.net/11104/0320987 |
confidential |
S |
arlyear |
2021 |
mrcbU10 |
2021 |
|