| bibtype |
L -
Prototype, methodology, f. module, software
|
| ARLID |
0543790 |
| utime |
20240103230006.6 |
| mtime |
20210714235959.9 |
| title
(primary) (eng) |
DTRiMC tool for TE0808-15-EG-1EE module on TEBF0808 carrier board |
| publisher |
|
| keyword |
System on Chip |
| keyword |
Zynq Ultrascale+ |
| keyword |
microprocessor |
| keyword |
HW accelerated computing |
| keyword |
automation |
| keyword |
Linux Debian Stretch |
| author
(primary) |
| ARLID |
cav_un_auth*0101120 |
| name1 |
Kadlec |
| name2 |
Jiří |
| institution |
UTIA-B |
| full_dept (cz) |
Zpracování signálů |
| full_dept (eng) |
Department of Signal Processing |
| department (cz) |
ZS |
| department (eng) |
ZS |
| full_dept |
Department of Signal Processing |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0101179 |
| name1 |
Pohl |
| name2 |
Zdeněk |
| institution |
UTIA-B |
| full_dept (cz) |
Zpracování signálů |
| full_dept |
Department of Signal Processing |
| department (cz) |
ZS |
| department |
ZS |
| full_dept |
Department of Signal Processing |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| author
|
| ARLID |
cav_un_auth*0225749 |
| name1 |
Kohout |
| name2 |
Lukáš |
| institution |
UTIA-B |
| full_dept (cz) |
Zpracování signálů |
| full_dept |
Department of Signal Processing |
| department (cz) |
ZS |
| department |
ZS |
| full_dept |
Department of Signal Processing |
| fullinstit |
Ústav teorie informace a automatizace AV ČR, v. v. i. |
|
| source |
|
| cas_special |
| project |
| project_id |
8A18013 |
| agency |
GA MŠk |
| ARLID |
cav_un_auth*0374054 |
|
| abstract
(eng) |
Evaluation package with eight 8xSIMD, FP03x8, floating-point, run-time-reconfigurable accelerators for Zynq Ultrascale+ TE0808-15EG-1EE module on TEBF0808 carrier board. The TE0808-15EG-1EE module and TEBF0808 carrier board are designed and manufactured by the company Trenz Electronic. Xilinx device ZU15-EG-1EE device requires in the design phase Xilinx Vivado tools version 2018.2. These tools must have enabled support for the Xilinx ZU15-EG-1EE device. The Xilinx Vivado 2018.2 is currently the last Xilinx toolchain supporting the ZU15-EG-1EE device. The evaluation package provides several pre-compiled HW designs represented in form of SD-cards containing the designs and API interface for SW developer in form of shared Debian Linux libraries. The SW developer can program ARM host application in standard gcc or g++ compiler and “make” can be used for compilation of host applications directly on the embedded Zynq Ultrascale+ ZU15-EG-1EE based system. |
| RIV |
JC |
| FORD0 |
20000 |
| FORD1 |
20200 |
| FORD2 |
20206 |
| reportyear |
2022 |
| num_of_auth |
3 |
| permalink |
http://hdl.handle.net/11104/0320986 |
| confidential |
S |
| arlyear |
2021 |
| mrcbU10 |
2021 |
|